Detail of "2081-12-1"

Reference

Semiconductor device fabrication process and apparatus

Semiconductor device fabrication process and apparatus. Suzuki, Takaaki; Ubutame, Toshihide; Kadoshima, Masaru; Murata, Yasuhiko (Hitachi Ltd., Japan). Jpn. Kokai Tokkyo Koho JP 2003017684 A2 17 Jan 2003, 5 pp. (Japanese). (Japan). CODEN: JKXXAF. CLASS: ICM: H01L029-78. ICS: H01L021-316. APPLICATION: JP 2001-197839 29 Jun 2001. DOCUMENT TYPE: Patent CA Section: 76 (Electric Phenomena) Section cross-reference(s): 57 Formation of a gate insulator film on a single crystal Si substrate in the title fabrication process involves (1) forming a high-dielec. oxide layer by MOCVD with an organometallic vapor and an oxidant, (2) reductive annealing the oxide layer, and (3) subsequently patterning a gate insulator film out of the annealed oxide layer. The process prevents unwanted formation of (a) a low-dielec. SiO2 layer on the interface between the Si substrate and the gate oxide film and (b) residual hydrocarbon impurities contaminating the oxide layer. The low-temp. 2081-12-1 and 7631-86-9 which are cas registry numbers of substances are two of reagents here. (300-400°) MOCVD process and the app. provide the gate insulator film with high dielec. property without current leakage in fabrication of MIS transistors. .

Characteristics of ZrO2 gate dielectric deposited using Zr t-butoxide and Zr(NEt2)4 precursors by plasma enhanced atomic layer deposition method

Characteristics of ZrO2 gate dielectric deposited using Zr t-butoxide and Zr(NEt2)4 precursors by plasma enhanced atomic layer deposition method. Kim, Yangdo; Koo, Jaehyoung; Han, Jiwoong; Choi, Sungwoo; Jeon, Hyeongtag; Park, Chan-Gyung (Division of Materials Science and Engineering, Hanyang University, Seoul 133-791, S. Korea). Journal of Applied Physics, 92(9), 5443-5447 (English) 2002 American Institute of Physics. CODEN: JAPIAU. ISSN: 0021-8979. DOCUMENT TYPE: Journal CA Section: 76 (Electric Phenomena) Scaling down of the microelectronic devices feature size is demanding high-quality ultra thin high-k gate dielec. as a potential replacement for SiO2 gate dielec. Among the high-k materials, ZrO2 is considered as a potential alternative to SiO2 gate dielec. <2 nm due to its thermodynamical stability as well as excellent elec. properties. For these reasons, the authors studied ZrO2 films prepd. by the normal at. layer deposition (ALD) and plasma enhanced ALD (PEALD) techniques using Zr t-butoxide and Zr(NEt2)4 metal org. precursors. ZrO2 films deposited by the PEALD method showed generally improved film qualities with relatively low-leakage current, negligible hysteresis, and low-C incorporation compared to those of the films deposited by the conventional ALD method. 2081-12-1 and 7440-44-0 are also in the experiment. Also, ZrO2 films deposited using Zr(NEt2)4 precursor showed better film qualities than those of films deposited using Zr t-butoxide. Esp., ZrO2 films deposited using Zr(NEt2)4 with O plasma showed the leakage current as low as ~2.5 ′ 10-9 A/cm2 with an equiv. oxide thickness value of ~1.4 nm. This study demonstrated the possible application of the PEALD technique for the high-quality ultra thin high-k gate dielec. film deposition. .