202101-3
Unarunotai et al.
Appl. Phys. Lett. 95, 202101 ͑2009͒
50
(a)
(b)
160.0µ
In summary, graphene films epitaxially grown on SiC
substrate were transferred to oxidized Si wafers for the fab-
rication of bottom gate field effect transistors. AFM, Raman,
LEED, and electrical measurements revealed the essential
features of the materials. Key attractive aspects of these pro-
cedures are the scalability to large areas and possibly area
selective transfer, the apparent ability to remove single layers
of graphene from multilayer films, and the applicability to
wide ranging classes of substrates, due to room temperature
operation. Directions for further study include reducing the
level of defects in the films, achieving improved transport
properties and developing procedures for SiC substrate re-
use.
VG= -100V
VG
=
=
=
=
=
=
=
=
-75V
-50V
-25V
0V
25V
50V
75V
100V
40
30
20
10
0
VG
VG
VG
VG
VG
VG
VG
120.0µ
80.0µ
40.0µ
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2
-100 -50
0
50 100
1/[(%gW)/L]
VG (V)
FIG. 4. ͑Color online͒ Scaling analysis of the behavior of graphene field
effect transistors. ͑a͒ Plot of device resistance as a function of scaled chan-
nel geometry. The small y-intercept is consistent with a contact resistance
that is small ͑Ͻ1 k⍀͒ and, to within uncertainties, independent of VG. ͑b͒
Plot of sheet conductance, evaluated from the slopes of linear fits to the data
of ͑a͒, as a function of VG. Linear fits determine the Dirac voltage ͑x inter-
cept͒ and the apparent mobility ͑slope͒.
The authors thank R. T. Haasch for technical supports on
XPS. This work is supported by the U.S. Department of En-
ergy, Division of Materials Sciences under Award No. DE-
FG02-07ER46471, through the Materials Research Labora-
tory and Center for Microanalysis of Materials ͑Grant No.
DE-FG02-07ER46453͒ at the University of Illinois at
Urbana-Champaign. S.U. was supported, in part, by the
Anandamahidol Foundation.
can be accounted for by different densities of holes in the
graphene.
To analyze these results quantitatively, neglecting fring-
ing fields, possible anisotropies in the transport and effects of
neighboring electrodes, we extracted the field effect mobility
from a selected device that incorporated a region of graphene
with a relatively low level of holes ͑3% of total area, i.e.,
device with electrodes R3 and R4͒. The ID-VD characteristics
and the dependence of R, the total resistance of the device
͑i.e., VD/ID at VD=−0.04 V͒ on VG appear in Figs. 3͑c͒ and
3͑d͒, respectively. The Dirac point is ϳ80 V. The slope of
the transfer curve near this point, dID/dVG, is ϳ−5
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a
hole mobility of
ϳ100 cm2/V-s calculated using a standard metal-oxide-
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one of Fig. 3, we performed a scaling analysis, shown in Fig.
4͑a͒. This analysis used all measured devices, with a simple
procedure to account for the different densities of holes. In
particular, we used a scaled resistance defined by R
=RS͓1/͑%gW/L͔͒+2RC where R is total resistance of de-
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contact resistance and %g, the percentage of graphene cov-
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tact resistance, extracted from the y intercept of the plot in
Fig. 4͑a͒, is below 1 k⍀ indicating a negligible role of con-
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examined here. The inverse of the slope defines the sheet
conductance ͑1/RS͒ at different gate voltages. Figure 4͑b͒
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device of Fig. 3. Although the large positive value of the
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