Controlled formation of individually seeded, electrically addressable silicon nanowire arrays for device integration

Article abstract of DOI:10.1063/1.2398900

The formation of large-scale arrays of individually seeded, electrically addressable Si nanowires with controlled dimension, placement, and orientation is demonstrated. Electron beam evaporated gold nanoparticles were used for nanowire synthesis. By contr

Full text of DOI:10.1063/1.2398900

Controlled formation of individually seeded, electrically addressable silicon nanowire
arrays for device integration
Ying-Lan Chang, Sung Soo Yi, Edmond Chow, Grant Girolami, Yim Young, Maozi Liu, Jörg Albuschies, and Jun
Amano
Citation: Applied Physics Letters 89, 223123 (2006); doi: 10.1063/1.2398900
View online: http://dx.doi.org/10.1063/1.2398900
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APPLIED PHYSICS LETTERS 89, 223123 ͑2006͒
Controlled formation of individually seeded, electrically addressable silicon
nanowire arrays for device integration
Ying-Lan Chang,a͒ Sung Soo Yi, Edmond Chow, Grant Girolami, Yim Young, Maozi Liu,
Jörg Albuschies, and Jun Amano
Agilent Laboratories, Agilent Technologies, 5301 Stevens Creek Blvd., Santa Clara, California 95051
͑Received 14 June 2006; accepted 15 October 2006; published online 1 December 2006͒
The formation of large-scale arrays of individually seeded, electrically addressable Si nanowires
with controlled dimension, placement, and orientation is demonstrated. Electron beam evaporated
gold nanoparticles were used for nanowire synthesis. By controlling the lithography and metal
deposition conditions, nanowire arrays with narrow size distributions have been achieved.
Low-energy postgrowth ion beam treatment has been utilized to control the orientation of Si
nanowires. This process also leads to the attachment of nanowires on the substrate. Fabrication of
planar devices with robust metal contact formation becomes feasible. The method enables efficient
and economical integration of nanowires into device architectures for various applications. © 2006
American Institute of Physics. ͓DOI: 10.1063/1.2398900͔
Semiconductor nanowires and nanotubes represent an
important class of nanostructured materials with potential to
impact applications from nanoscale electronics to biotech-
nology. Field effect transistors based on silicon nanowires
͑SiNWs͒ and carbon nanotubes have been demonstrated as
good candidates for ultrasensitive, miniaturized molecule
sensors.1–3 Because of the high surface-to-volume ratio of
the nanostructures, their electronic characteristics may be
sensitive enough to a very small amount of charge transfer
such that single molecule detection becomes possible.1
The vapor-liquid-solid ͑VLS͒ growth mechanism4 is an
ideal synthetic technique in the gas phase to produce nano-
wires with high crystalline quality required for sensing ap-
plications. Superior performance based on individual SiNW
devices has been demonstrated.1 However, devices have
been constructed around single or several dispersed SiNWs.
For practical applications, efficient and precise manipulation
and placement of nanowires at desired locations need to be
established to allow the integration with microfluidics and
cesses is described. SiNWs with controlled dimensions and
specific placement were produced by the conventional
chemical vapor deposition via the VLS process. Postgrowth
ion-beam alignment process was employed to control the
orientation of nanowires. This process provides a simple yet
reliable method for enhanced control over the placement and
handling of one-dimensional nanostructures. As a result, in-
tegration of nanowires with various device architectures can
be realized.
The fabrication process begins with a doped Si wafer
with 160 nm thermal oxide. Electron-beam lithography
͑EBL͒ and electron-beam evaporation were utilized to define
the location of catalyst. An array of Au nanodisks with di-
ameter of ϳ40 nm and thickness of ϳ10 nm is shown in
Fig. 1. Such Au nanodisks were used as catalyst for mediat-
ing growth of silicon nanowire. The sizes of metal catalyst
controlling the diameters of SiNWs can be tailored by the
electron-beam lithography and metal deposition steps. It has
been noticed that the edge of some of the Au naoparticles is
rough and ill defined. This is likely related to imperfection in
lithography/metal deposition/lift-off processes. The shape of
Au nanoparticles could be improved by using e-beam lithog-
raphy with better resolution and metallization with better
directionality.
complementary-metal-oxide
circuits.
semiconductor
͑CMOS͒
Most of the existing fabrication methods for nanowire
devices utilize nanometer-scale colloidal catalyst particles. It
is important, yet challenging, to control the placement of
these particles with the precision required to form large-scale
arrays. As a result, postgrowth flow-directed and electric-
field assisted assembly techniques have been proposed and
demonstrated.5,6 However, such approaches may not be suit-
able for nanowires with small diameters. Alternatively, con-
trolled growth of SiNWs in predetermined configurations has
been demonstrated using Si ͑111͒ as substrate.7,8 Patterned
depositions of the gold seeds led to confinement of the ver-
tical nanowire growth to selected regions. However, forma-
tion of metal contact remains challenging for such device
configuration.
The growth of SiNWs was carried out at temperatures
between 450 and 550 °C using 2% disilane ͑Si2H6͒ in H2 as
a precursor and hydrogen as a carrier gas. Although the edge
of the particles was not well defined, it did not appear to
In this letter, a pathway to fabricating large scale, high-
density nanowire arrays using standard semiconductor pro-
a͒
Author to whom correspondence should be addressed; also at Nanomix,
FIG. 1. ͑Color online͒ SEM images of an array of Au nanoparticles on SiO2
surface prepared by e-beam lithography followed by e-beam evaporation of
gold and lift-off.
Inc., 598 Horton Street, Suite 600, Emeryville, California 94608; FAX:
510-658-0425; electronic mail: ychang@nano.com
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0003-6951/2006/89͑22͒/223123/3/$23.00 89, 223123-1 © 2006 American Institute of Physics
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223123-2
Chang et al.
Appl. Phys. Lett. 89, 223123 ͑2006͒
FIG. 2. ͑Color online͒ High-resolution TEM image of a Si nanowire show-
ing ͓111͔ lattice fringes and ͗111͘ growth direction.
affect the growth of the nanowires under optimal process
conditions. SiNWs with diameters ranged from 20 to 50 nm
have been obtained by changing the parameters of metal
deposition and e-beam lithography. With growth rate of
about 0.2 ␮m/min, the length of SiNWs in the range of
1–5 ␮m can be tailored by controlling growth time. Exten-
sive transmission electron microscopy characterization indi-
cates that these wires are single crystalline in nature, as
shown in Fig. 2.
It has been reported previously that SiNWs grown via
VLS process using thin gold films deposited on plain sub-
strates did not provide good diameters control of the result-
ing wires due to the randomness of the film breakup at
growth temperatures.9,10 Our results indicate that with opti-
mized process and growth conditions, a single SiNW can be
grown from each lithographically defined catalyst site, as
shown in Fig. 3. Fabrication of large-scale arrays of SiNWs
then becomes feasible. The diameter, position, and density of
SiNWs can be controlled to create desired arrays through
lithographic means. Nanowires can be grown with narrow
size distributions approaching those of the seed particles, as
determined by scanning electron microscopy ͑SEM͒. As an
example, the diameter of SiNWs grown from Au nanodisks
with ϳ40 nm is in the range of 40–50 nm ͑45 5 nm͒. Re-
sults indicated that most SiNWs grew straight, as shown in
Fig. 3͑c͒. Some SiNWs exhibited kinking. Kinking of
SiNWs has been reported in the literature,10,11 and is most
likely related to the instability of liquid-solid interface be-
tween molten Au–Si alloy and a SiNW during the growth.
Unlike Si nanowires grown epitaxially on Si ͑111͒ sub-
strate, due to lack of crystalline characteristics of the SiO2
surface, the nanowires grown on SiO2 surface are randomly
oriented after growth, as shown in Fig. 3. For many applica-
tions, having the wires parallel to each other and possibly
parallel to the substrate surface would aid fabrication. Ac-
cordingly, an ion beam irradiation process was employed to
align the SiNWs in a desired manner.12 At the present case,
typical argon ion energy within the range of about 1–4 keV
with a flux density of ϳ6ϫ1015 ions/cm2 was applied. The
treatment was performed at some angle to the substrate sur-
face, typically within the range of about 10°–45°. It was
found that effective alignments of nanowires with diameters
ranging from 20 to 50 nm can be readily achieved with less
than 30 s treatment. The attachment of nanowires to sub-
strate surface after ion beam irradiation and the subsequent
FIG. 3. ͑Color online͒ ͑a͒ Large-scale arrays of Si nanowires grown on a
3 in. e-beam patterned substrate. ͑b͒ Plan-view SEM image of an array of
SiNWs grown over large area. ͑c͒ SEM image of a typical, single SiNW
grown from a lithographically defined catalyst site.
scope ͑AFM͒ measurement. When similar conditions were
used for sputter etching of thermally grown SiO2, the thick-
ness of SiO2 sputter etched during a similar exposure to the
ion beam was less than ϳ2 nm. Therefore, the alignment
process using an ion beam should not significantly change
the properties of the nanowires.
Lastly, electrical contacts to the ends of SiNWs were
made by defining pairs of electrodes using EBL and subse-
quent evaporation of contact metal and lift-off. Arrays of
high density SiNWs with controlled orientation have been
obtained. The SEM and AFM images of a connected SiNW
between two metal contacts are shown in Fig. 4. Compared
with a prior approach employing formation of vertically
aligned Si nanowires relative to substrates, this method pro-
vides a route for the fabrication of planar devices with robust
metal contact formation. A typical I-V characteristic of an
electrically connected SiNW is shown in Fig. 5. The I-V
characterization from devices without a connected wire indi-
cate that the leakage current is negligible ͑less than picoam-
peres͒ after the growth and processing steps. The I-V char-
acterization from devices with connected wires with
diameter of 35–40 nm exhibits linear characteristics with re-
sistivity of approximately 100 ⍀ cm, which is fairly consis-
tent with the value for the nonintentionally doped Si. These
experimental observations indicate that the deteriorate effects
of postgrowth process, including ion-beam alignment and
metal contact formation on the crystalline quality of nano-
wire, are negligible. We have also found the presence of thin
amorphous layer on substrate surface when the growth was
carried out in nonoptimized conditions. This amorphous
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device fabrication process is verified by atomic force micro-
layer can lead to an increase in leakage current. Therefore,
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223123-3
Chang et al.
Appl. Phys. Lett. 89, 223123 ͑2006͒
FIG. 5. I-V measurement of an electrically connected Si nanowire. Solid
line: with a nanowire, and dotted line: without a nanowire.
Density of ion flux and impact energy of ionic species can be
precisely controlled, which leads to a reproducible process,
and can potentially offer high throughput for the fabrication
of devices in large scale.
The authors would like to acknowledge L. Trevillion’s
technical assistance and the valuable discussion from D.
Yang, L. Mirkarimi, and T. Kopley. The authors also like to
thank the management support from D. Chamberlin, R. Jae-
ger, A. Grot, and J. Hollenhorst.
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