Platinum Electroless Deposition on Silicon from Hydrogen Fluoride Solutions: Electrical Properties

Article abstract of DOI:10.1149/1.1382591

Current transport through mesa structures formed by Pt electroless deposition on p-Si wafers has been studied. The silicon treatment in the solution of sodium chloroplatinate in dilute HF acid is shown to result in both Pt nucleation on the Si surface (cathodic process) and Si wafer etching by fluoride ions (anodic process). These processes occurred simultaneously, forming the developed Pt/Si interface. Auger electron spectroscopy and C-V curves reveal the formation of a dielectric interface layer between Pt and Si of hundreds of nanometers that extends with the time of treatment. The electrical properties of mesa structures exhibit Schottky barrier behavior. Both conditions of current transport along the deposited layer and parameters of Schottky contact are defined vs. the deposition time and compared with that for thermally deposited Pt contact.

Full text of DOI:10.1149/1.1382591

C528
Journal of The Electrochemical Society, 148 ͑8͒ C528-C532 ͑2001͒
0013-4651/2001/148͑8͒/C528/5/$7.00 © The Electrochemical Society, Inc.
Platinum Electroless Deposition on Silicon from Hydrogen
Fluoride Solutions
Electrical Properties
G. V. Kuznetsov,a V. A. Skryshevsky,a,z T. A. Vdovenkova,a A. I. Tsyganova,a
P. Gorostiza,b, and F. Sanz
*
b,**
aDepartment of Radiophysics, Kiev Shevchenko University, 01033 Kiev, Ukraine
bDepartament de Quimica Fisica, Facultat de Quimica, Universitat de Barcelona, E-08028 Barcelona, Spain
Current transport through mesa structures formed by Pt electroless deposition on p-Si wafers has been studied. The silicon
treatment in the solution of sodium chloroplatinate in dilute HF acid is shown to result in both Pt nucleation on the Si surface
͑cathodic process͒ and Si wafer etching by fluoride ions ͑anodic process͒. These processes occurred simultaneously, forming the
developed Pt/Si interface. Auger electron spectroscopy and C-V curves reveal the formation of a dielectric interface layer between
Pt and Si of hundreds of nanometers that extends with the time of treatment. The electrical properties of mesa structures exhibit
Schottky barrier behavior. Both conditions of current transport along the deposited layer and parameters of Schottky contact are
defined vs. the deposition time and compared with that for thermally deposited Pt contact.
© 2001 The Electrochemical Society. ͓DOI: 10.1149/1.1382591͔ All rights reserved.
Manuscript submitted August 11, 2000; revised manuscript received April 25, 2001. Available electronically June 29, 2001.
The method of electroless deposition is known to provide a con-
2. Sodium chloroplatinate was precipitated in the reaction of
tinuous metal coating on a semiconductor substrate by simple im-
mersion in an appropriate aqueous solution and may have applica-
tions in microelectronics, namely, as the ultralarge scale integrated
͑ULSI͒ metallization,1 as thin metal etch masks for deep UV
lithography,2 as ohmic contacts on GaAs,3 etc. The main advantages
of electroless deposition are the deposition selectivity, high metal
purity, low operating temperature, planar topography, good working
characteristics, low cost, and applicability for mass production.4,5
Recently, methods of electroless deposition of various metals on
an Si slab using the aqueous solutions of HF and metal salt have
been elaborated.6-8 The fluoride acid is the necessary component of
the majority etchants applied for electroless or electrochemical sili-
con treatment. HF is also used widely in order to remove the native
silicon oxide from the Si surface and to form the porous silicon
layers.9 The integration of the metal deposition process with silicon
etching allows the creation of metal-semiconductor structures which
may find practical implementation in chemical sensors.10 The
chemical interaction results in a metal penetration into an Si slab to
a depth of up to few micrometers and results in alterations of the
electrical properties of surface layer.6-8 Though the structural fea-
tures of such surfaces have already been studied there is a lack of
data concerning the electrical behavior.
PtCl4 ϩ 3HCl ϩ 3NaOH ϭ Na2PtCl6 ϩ NaCl ϩ 3H2O ͓2͔
3. The plating solution was prepared by adding the salt to an HF
solution
Na PtCl :HF 20%͒ ϭ 10Ϫ3 mol/L
͓3͔
͑
2
6
All solutions were prepared from Supra pure grade reagents and
twice-deionized water. The time of treatment ranged between 1 and
60 min. Immediately after the removal of the native oxide, patterned
substrates were immersed vertically in the gently stirred solution.
After Pt deposition all patterns were rinsed in twice-deionized water.
Then 0.1-0.2 ␮m of Pt was deposited thermally at 10Ϫ5 Pa to form
mesa structures of 1 mm diam. Nickel ohmic contacts were formed
on the rear side of Si wafers by thermal deposition.
The morphological characteristics of the deposited patterns were
examined by scanning electron microscopy ͑SEM͒, the chemical
analysis of the surface was performed by Auger electron spectros-
copy ͑AES͒ with Arϩ ion sputtering ͑09-IOS-10͒, IR-spectroscopy
͑IKS-29͒, and X-ray diffraction ͑XRD͒. Standard I-V and CV ͑1
MHz͒ measurements were used for electrical characterization of the
elaborated structures.
In this work we consider the electrical properties of Si structures
produced by treatment of Si with HF aqueous solutions of a plati-
num salt. The choice of Pt metallization is based on its high stability
and good adhesion to Si.
Experimental
Figure 1 shows the design of the studied mesa patterns. The
boron-doped (Np ϭ 2-3 • 1015 cmϪ3) silicon slabs with ͑100͒ crys-
talline orientation, 300 ␮m thick, were used as substrates. The native
silicon oxide was removed in aqueous solution HF:H2O ϭ 1:4 be-
fore metal deposition. Then the silicon surfaces were treated by
platinum deposition performed by immersing Si in a solution pre-
pared by dissolving sodium chloroplatinate in dilute HF. The plating
solution was obtained in the following way8
1. The chloroplatinum complex was performed by dissolving the
Pt in the mixture of HNO3 and HCl acids
3Pt ϩ 4HNO3 ϩ 12HCl ϭ 3PtCl4 ϩ 4NO ϩ 8H2O
͓1͔
* Electrochemical Society Student Member.
** Electrochemical Society Active Member.
z E-mail: skrysh@rpd.univ.kiev.ua
Figure 1. The design of the measured structures.
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Journal of The Electrochemical Society, 148 ͑8͒ C528-C532 ͑2001͒
C529
Figure 2. SEM of Si surface after 60 min of the electroless deposition of Pt.
Surface Analysis
The treatment in the described solution results in the Pt nucle-
ation on the Si surface. SEM images show hemispherically shaped
grain related to Pt nuclei ͑Fig. 2͒. These nuclei are the centers of the
charge exchange and accelerate the process of metal coating. Pt ions
act as the oxidizing agent of Si, while fluorine species act as the
complexing agent of Si oxidation products. During treatment the
concentration of soluble metal ions decreases and, simultaneously,
the Si wafer is etched. The Pt nucleation causes a large increase in
the roughness of the Si wafer. After 30-60 min of treatment the
nuclei grains have typical dimensions of 100 nm. In contrast, the
surface irregularities are less than 1 nm following etching in a dilute
solution of HF ͑20%͒ without Pt salt.
Figure 3. AES profile of Pt, O, and Si at ͑a͒ 30 and ͑b͒ 60 min treatment.
The sputtering velocity is ϳ100 nm/min.
The depth profile of Pt, O, and Si atoms near the treated surface
is presented in Fig. 3. The increase of treatment time results in the
observation of Pt from deeper region, than can be accounted for by
the increase of roughness with deposition time.
The deposition process may be summarized as follows
PtCl26Ϫ͑aq͒ ϩ Si0͑s͒ ϩ 6FϪ͑aq͒ ϭ Pt0͑s͒ ϩ SiF26Ϫ͑aq͒ ϩ 6ClϪ͑aq͒
͓4͔
The formation of Si-O, Si-H species plays the important role in
the process of Si etching in fluorine acid solutions.11 IR absorption
spectra show that the as-treated surface is covered by hydrogen spe-
cies, having very weak IR absorption peaks in the 2000-2200 cmϪ1
range. These species can modify the chemical reactivity of Pt/Si
surface.
PtCl62Ϫ ϩ 4eϪ ϭ Pt0 ϩ 6ClϪ
Si0 ϩ 6FϪ ϭ SiF62Ϫ ϩ 4eϪ
͓5͔
͓6͔
Electrical Characteristics
In other words, the Pt deposition process can be considered as
two half-cell electrochemical reactions: the cathodic Pt͑IV͒ reduc-
tion and the anodic Si oxidation processes occur simultaneously on
the Si surface and exchange the charge carriers via the Si substrate.
Fluorine ions in solution not only prevent the creation of the silicon
oxide, but dissolve the Si skeleton to a soluble complex of SiF62Ϫ
͑Reaction 4͒.
Figure 4 presents the Si surface resistivity ͑measured by the four
point probe method͒ vs. the time of treatment. The obtained results
are compared with those for samples of thermal deposited Pt on Si
wafers. The thin metal film is formed from separate metal islands at
the first stages of both thermally and electroless deposition of Pt.
This explains the large value of specific resistivity of Pt film com-
pared with the bulk material. However, the transition from islands-
type film to a continuous one occurs abruptly for thermally deposed
Pt on a polished Si wafer and smoothly for electrolessly deposited Pt
on the formed roughness substrate ͑Fig. 2͒.
The C-V characteristics of contact Pt-p-Si structures display the
typical behavior of a metal-semiconductor potential barrier having
the interface dielectric layer ͑Fig. 5a͒.12 In the region of high for-
ward applied voltages, eV ӷ e␸b , the capacity of the structure does
not depend on the applied voltage; it is determined by the capacity
of the interface dielectric layer C1 between the metal and silicon.
The longer the electroless deposition, the lower the total capacity
The etching rate is governed by both the mass transport of fluo-
rine ions into the reaction zone and an initial concentration of HF. At
Ͻ
a small pH
2, the HF species dominates the aqueous solutions of
HF, then HFϪ2 ions prevail at 2
pH
5, and FϪ ions predominate
Ͻ
Ͻ
5
Ͼ
at pH
6. The formation of Pt nuclei is correlated to the Si etch-
ing process in the surrounding regions. Silicon etching and metal
deposition is initiated on surface defects ͑scratches, impurity con-
tamination, Si steps, etc.͒. There is also evidence of a direct chemi-
cal reaction between Pt and Si in the HF solutions, leading to the
formation of platinum silicide.6
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C530
Journal of The Electrochemical Society, 148 ͑8͒ C528-C532 ͑2001͒
Figure 4. The surface resistivity of Pt coating vs. time of thermal and elec-
troless deposition.
and C1 , as well, is observed. For films grown at long deposition
Ͼ
times (t
30 min) the total capacity is defined by the capacity of
dielectric layer. Thus, the C-V curves transform from the Schottky-
type ͑when CϪ2 is a linear function of V͒ to a dielectric layer-type
͑the capacity depends on applied voltage insufficiently͒.
The total capacity is a series connection of the Schottky barrier
C ϭ e␧ ␧ N /2͑e␸ Ϫ eV )]1/2S and the capacity of dielectric
͓
2
0
2
p
0
2
layer C1 ϭ ␧ ␧1S/d. Here ␧ and ␧ are dielectric constants of the
0
1
2
Figure 6. The I-V curves of Pt-Si structures without treatment and at sev-
eral times of electroless deposition.
interface layer and Si, respectively, Np is the doping level in Si, e␸
0
is the potential barrier, V2 is the voltage drop on the space-charge
region of Si, d is the thickness of the interface layer. Such an ap-
proach permits the determination of the potential barrier height
e␸b ϭ e␸ ϩ Ef knowing the total capacity C0 at V ϭ 0 and capac-
0
12
ity of interfacial layer C1
␸ ϭ 1/2͒␧ ␧ N S2 CϪ1 Ϫ C1Ϫ1
͒
͓7͔
2
͑
͑
0
0
2
p
0
Knowing the value of the Fermi energy of 0.2 eV for the studied
Si slab and experimental values of capacity C0 and C1 , we can
calculate the potential barrier, e␸b , that lies in the range of 0.26-0.3
eV. For contact structures without treatment or short time electroless
deposition, the substrate doping level in the space-charge region
defined from slope of CϪ2 ϭ f(V) curve is Np ϭ 3.1015 cmϪ3 ͑Fig.
5b, curve 1͒. After long-time electroless deposition, the dependence
CϪ2 ϭ f(V) is not fitted by linear approximation which indicates
the inhomogeneous distribution of doping impurities in the surface
layer.
The I-V curves of the elaborated structures exhibit the typical
model of Schottky contact of the metal-semiconductor type having
the dielectric interface layer ͑Fig. 6͒. The ideality factor n lies in the
range of 1.3-1.5 at small forward V. The increase of the time of
electroless deposition ensures the decrease of both forward and re-
verse currents. Moreover, the dependence of ln I ϭ f(V) for all for-
ward applied voltages is not fitted by linear approximation. This
indicates the dominant role of the interface layer for current trans-
port. The calculation of series specific resistivity of the interface
layer from the I-V curve at a large applied voltage gives
102-103 ⍀ cm. The value of the potential barrier defined from the
saturation current Is can be written as e␸ ϭ kln(AT Ss)12 and equals
2
Figure 5. ͑a͒ The C-V and ͑b͒ CϪ2-V curves of contact structures Pt-Si
ˆ
b
without treatment and at several times of electroless deposition.
0.25 to 0.28 eV coinciding with that calculated from C-V data.
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Journal of The Electrochemical Society, 148 ͑8͒ C528-C532 ͑2001͒
C531
Figure 9. The thickness of dielectric layer vs. time of electroless deposition.
Figure 7. The forward currents at V ϭ 4 V as a function of dielectric layer
thickness: ͑ ͒ theory, ͑᭡͒ experimental.
To prove the dominant mechanism of current transport through
the interface dielectric layer we plotted the current vs. dielectric
thickness at V ϭ const ͑Fig. 7͒. As can be seen, the experimental
values fit the Poul-Frenkel emission better than thermoionic emis-
sion.
Ͼ
At large applied forward voltages eV e␸ the I-V curves can
b
be fitted by the ln I ϳ V1/2 dependence. Such dependence is typical
both for Schottky emission and Poul-Frenkel emission for the di-
Figure 8 represents the temperature dependence of the current
electric layer.12 At room temperature and eV ӷ e␸ the shape of
through Pt-p-Si contact at V ϭ const. The slope of ln(I) ϭ f(TϪ1
)
b
ln I ϳ V1/2 curve does not depend on the thickness of the dielectric
layer, contact area, material of metal terminals ͑Fig. 6͒. It is sup-
posed that at large temperatures and electric fields of 105-106 V/cm
the conductivity of the dielectric layer is governed by the field-
assisted bulk processes of thermoionic emission of electrons from
the deep traps into the conductive band. Thus, the I-V curves can be
written as
gives the activation energy for that structure without treatment is
0.25-0.3 eV. It coincides with the barrier height of the structure. The
electroless deposition of Pt decreases the activation energy up to
0.15-0.2 eV which does not depend on deposition time. It is known
that the Pt impurity forms deep levels in Si, two of which are ac-
ceptors Ef ϩ Ei ϭ 0.36 eV and Ee Ϫ Ef ϭ 0.25 eV and one is a
donor Ev ϩ Ei ϭ 0.3 eV.13 Small values of the activation energy in
the interface layer ͑that are less than energy of traps in Si͒ imply
another nature of activation energies, e.g., they can be conditioned
by another chemical composition of the interface layer.
Ϫe ␸ Ϫ ͱ
͑
AV
d
eV/␲␧ ␧1d͒
b
0
I ϭ
exp
͓8͔
ͫ
ͬ
kT
The analytic expressions for ␤ and C1 can be applied to deter-
mine the dielectric constant and thickness of interface layer12
where A is a constant, depending on the contact area and charge
carriers mobility, e␸ is the trap energy, ␤ ϭ (e/kT)(e/␲␧ ␧1d)1/2
1/2
␧ ␧ ϭ ͑e/␤kT͒͑eC1 /␲S͒
0 1
͓9͔
b
0
is the parameters of nonlinearity of the I-V curve. Note that the last
1/2
d ϭ e/␤kT͒ eS/␲C ͒
͓10͔
͑
͑
1
equation describes Schottky emission too, however, the value of e␸
b
characterizes the energy depth of the electron trap and ␤ is two
times bigger than for the Schottky emission.12
The results are presented in Fig. 9 and 10. At short treatment
Figure 8. The forward currents vs. reverse temperature at V ϭ 4 V for the
Pt-Si structure without treatment and at several times of electroless deposi-
tion.
Figure 10. The dielectric constant of interface layer as function of layer
thickness.
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C532
Journal of The Electrochemical Society, 148 ͑8͒ C528-C532 ͑2001͒
times the average thickness of the interface layer increases up to
mechanisms of current transport through the interface dielectric
layer.
Ͼ
saturation at t
30 min. The value of the dielectric constant ␧1 ,
that is averaged along all of the dielectric layer, changes in the range
of 8-5 depended on time of electroless deposition. One of the rea-
Universitat de Barcelona assisted in meeting the publication costs of this
article.
sons for the small value of ␧ compared with the Si substrate is
1
References
conditioned by the porosity, P, of the interfacial layer. If the porous
layer is considered as a mixture of Si and air, then ␧ ϭ (1
1. C. H. Ting and M. Paunovic, J. Electrochem. Soc., 136, 456 ͑1989͒.
2. J. M. Calvert, M. S. Chen, C. S. Dulcey, J. H. Georger, M. C. Peckerar, J. M.
Schnur, and P. E. Schoen, J. Electrochem. Soc., 139, 1677 ͑1992͒.
3. L. A. D’Asaro, S. Nakahara, and I. Okinaka, J. Electrochem. Soc., 127, 1935
͑1980͒.
1
Ϫ P)2 ϩ Pair . The alteration of ␧ in the range of 8 to 5 changes
1
the porosity to within 0.33-0.62.
4. F. Pearlstein, in Modern Electroplating, F. A. Lowenheim, Editor, p. 170, Wiley
New York ͑1974͒.
5. S. Verhaverbeke, H. Bender, M. Meuris, P. W. Mertens, H. P. Schmidt, and M. M.
Heyns, in Proceedings MRS Symposium on Surface Chemical Cleaning and Pas-
sivation for Semiconductor, San Francisco, CA ͑1993͒.
Conclusions
The treatment of Si in a dilute HF solution containing sodium
chloroplatinate results in spontaneous Pt deposition and formation of
the dielectric interfacial layer between the Pt and Si substrate of up
to hundreds of nanometers. The thickness of the dielectric interface
layer increases with the time of deposition. The dielectric constant
of this layer varies in the range from 5 to 8, that might be caused by
the sponge-like nature of the layer. The C-V and I-V curves elabo-
rated at short-time treatment structures display the typical behavior
for Schottky contact having the interface dielectric layer, the value
of potential barrier reaches up to 0.3 eV. Other behavior is observed
for structures created by longer deposition times: their capacity does
not depend on applied voltage and exponential law poorly fits I-V
curves. The Poul-Frenkel emission was regarded as one of possible
6. P. Gorostiza, J. Servat, J. R. Morante, and F. Sanz, Thin Solid Films, 275, 12
͑1996͒.
7. C. Longo, P. T. A. Sumodjo, and F. Sanz, in Electrochemically Deposited Thin
Films III, M. Paunovic and D. A. Scherson, Editors, PV 96-19, p. 115, The Elec-
trochemical Society Proceedings Series, Pennington, NJ ͑1997͒.
8. E. V. Buzaneva, V. I. Strikha, and P. P. Shevchuk, J. Phys. Chem., 54, 715 ͑1980͒.
9. G. Cullis, L. T. Canham, and P. D. G. Calcott, J. Appl. Phys., 82, 909 ͑1997͒.
10. V. I. Strikha, V. A. Skryshevsky, V. Polishchuk, E. Souteyrand, and J. R. Martin, J.
Porous Mater., 7, 111 ͑2000͒.
11. R. L. Smith and S. D. Collins, J. Appl. Phys., 71, R1 ͑1992͒.
12. S. M. Sze, Physics of Semiconductor Devices, John Wiley & Sons, New York
͑1981͒.
13. A. G. Milnes, Deep Impurities in Semiconductor, Wiley, New York ͑1973͒.
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