APPLIED PHYSICS LETTERS 100, 143502 (2012)
Thanh Thuy Trinh,1,2 Van Duy Nguyen,3,a) Hong Hanh Nguyen,1 Jayapal Raja,1
Juyeon Jang,1 Kyungsoo Jang,1 Kyunghyun Baek,1 Vinh Ai Dao,1,2 and Junsin Yi1,a)
1Information and Communication Device Laboratory, School of Information and Communication Engineering,
Sungkyunkwan University, South Korea
2Faculty of Materials Science, Vietnam National University, Ho Chi Minh City, Vietnam
3International Training Institute for Materials Science, Hanoi University of Science and Technology, Vietnam
(Received 28 November 2011; accepted 11 March 2012; published online 2 April 2012)
Influence of Schottky contact between source/drain electrodes and high conductivity a-InGaZnO
active layer to the performance of nonvolatile memory devices was first proposed. The Schottky
barrier devices faced to the difficulty on electrical discharging process due to the energy barrier
forming at the interface, which can be resolved by using Ohmic devices. A memory window of
2.83 V at programming/erasing voltage of 613 V for Ohmic and 5.58 V at programming voltage of
13 V and light assisted erasing at ꢀ7 V for Schottky devices was obtained. Both memory devices
using SiO2/SiOx/SiOxNy stacks showed a retention exceeding 70% of trapped charges 10 yr with
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operation voltages of 613 V at an only programming duration of 1 ms. 2012 American Institute
In recent times, amorphous InGaZnO (a-IGZO) film has
been widely studied for using as an active layer in thin-film
transistors (TFTs) because of its inherent advantages, which
include high uniformity, transparence, and high mobility
compared to amorphous silicon.1,2 For next-generation appli-
cations, such as system-on-panel (SOP) displays, memory-
in-pixel, and transparent memory, an a-IGZO-based nonvo-
latile memory (NVM) is required, but high operating vol-
tages, retention loss, and cycling decay are challenges that
need to be addressed before arriving at the appropriate
material.3–5
deposition (IPCVD) process on a low-resistivity c-Si sub-
strate as gate electrode. An SiO2-blocking layer, with a
thickness of 20 nm, and an SiOx storage layer, with a thick-
ness of 20 nm at an SiH4:N2O ratio of 6:1, were sequentially
deposited at 170 ꢁC. Subsequently, an ultrathin amorphous
silicon (a-Si) film with an SiH4:H2 gas ratio of 5:20 was de-
posited with a RF power of 50 W and a temperature of
200 ꢁC for 2 min. Then, N2O plasma treatment was carried
out for the creation of the 3.2-nm-thick SiOxNy tunneling
layer. After the deposition of OOxOn memory stacks, an
active layer of 100-nm-thick a-IGZO film was deposited by
DC-pulsed magnetron sputter using a ceramic IGZO target
(Ga2O3:In2O3:ZnO ¼ 1:1:1) at room temperature. The base
vacuum level was maintained at a pressure lower than
5 ꢂ 10ꢀ5 Torr while the working pressure and DC power
were maintained at 5 ꢂ 10ꢀ3 Torr and 140 W, respectively,
during the sputtering. Before deposition, the presputtering
process was performed for 10 min to remove any contamina-
tion that may be present on the target surface. Then, the post-
annealing process was performed for an as-deposited sample
in an air atmosphere using rapid thermal annealing equip-
ment at a temperature of 250 ꢁC for 1 h. After the postanneal-
ing process, 150-nm-thick silver (Ag) or aluminum (Al)
films were vaporized to form Schottky or conventional
Ohmic devices, respectively. Finally, S/D regions were pat-
terned by the photolithography method using two mask-
patterning processes. The electrical and memory characteris-
tics of the devices were measured by Semiconductor Param-
eter Analyzer equipment (Model EL 420C).
The TFTs using Schottky barrier (SB) at source/drain
(S/D) electrodes (SBTFT) were introduced to improve the
off current in silicon TFTs.6–8 Hence, SBTFTs could be fab-
ricated on the high carrier concentration a-IGZO layer with-
out the problem of high off currents. Otherwise, the
increasing of mobility with carrier concentration is relied on
IGZO system.1,9 Due to these advantages, the IGZO SBTFTs
with high conductivity become potential candidates to
achieve higher field effect mobility (lFE).
In this study, the performance of NVM devices on
a-IGZO is investigated using the memory stack of
SiO2/SiOx/SiOxNy (OOxOn) that has previously been
reported to show some outstanding features, such as low
operating voltages and excellent retention.10,11 The devices
were fabricated in two types of TFT-NVM structures with
Schottky and Ohmic contacts between S/D electrodes and
active layer. The memory behavior of Schottky barrier NVM
(SBNVM) devices is explained in comparison to the
conventional Ohmic contact device (ONVM).
The bottom gate NVM structures were fabricated on two
kinds of a-IGZO films. The high conductivity layer was de-
posited in only Ar ambient condition and low conductivity
one was formed at Ar and O2 mixing gases with 80% O2
content. After heat treatment, conductivity of the two 100-
nm-thick films was found to be stable with values of about
101 and 10ꢀ4 S cmꢀ1, respectively. The SBNVM was fabri-
cated on high conductivity a-IGZO layer using 150-nm-thick
The multi-stack OOxOn-IGZO NVM devices were fab-
ricated in the following steps: OOxOn memory stacks were
deposited using inductive-coupled plasma chemical vapor
a)Authors to whom correspondence should be addressed. Electronic
addresses: nguyenvanduy@itims.edu.vn and yi@yurim.skku.ac.kr. Tel.:
þ82-31-290-7139. Fax: þ82-31-290-7159.
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0003-6951/2012/100(14)/143502/4/$30.00
100, 143502-1
2012 American Institute of Physics
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